PM_FUSES_2__BapmVddCVidHiSidd_5_MASK 3639 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_0_1_sh_mask.h #define PM_FUSES_2__BapmVddCVidHiSidd_5_MASK 0xff0000
PM_FUSES_2__BapmVddCVidHiSidd_5_MASK 3637 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_0_sh_mask.h #define PM_FUSES_2__BapmVddCVidHiSidd_5_MASK 0xff0000
PM_FUSES_2__BapmVddCVidHiSidd_5_MASK 2837 drivers/gpu/drm/amd/include/asic_reg/smu/smu_7_1_1_sh_mask.h #define PM_FUSES_2__BapmVddCVidHiSidd_5_MASK 0xff0000