PM_ASSERT_RESET  5675 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h typedef enum PM_ASSERT_RESET {
PM_ASSERT_RESET  5678 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_enum.h } PM_ASSERT_RESET;
PM_ASSERT_RESET  6313 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h typedef enum PM_ASSERT_RESET {
PM_ASSERT_RESET  6316 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_enum.h } PM_ASSERT_RESET;
PM_ASSERT_RESET  7932 drivers/gpu/drm/amd/include/navi10_enum.h typedef enum PM_ASSERT_RESET {
PM_ASSERT_RESET  7935 drivers/gpu/drm/amd/include/navi10_enum.h } PM_ASSERT_RESET;
PM_ASSERT_RESET  12469 drivers/gpu/drm/amd/include/vega10_enum.h typedef enum PM_ASSERT_RESET {
PM_ASSERT_RESET  12472 drivers/gpu/drm/amd/include/vega10_enum.h } PM_ASSERT_RESET;
PM_ASSERT_RESET   682 drivers/gpu/drm/radeon/rs600d.h #define   PM_ASSERT_RESET                              (1 << 20)