PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 11592 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0xf
PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 11404 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0xf
PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 8386 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0x0000000f
PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 2042 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DPREFCLK__SHIFT 0xf