PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 11588 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 0x7
PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 11400 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 0x7
PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 8384 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 0x00000007
PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 2038 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define PLL_POST_DIV__PLL_POST_DIV1P5_DISPCLK__SHIFT 0x7