PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 11666 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 0x10 PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 11478 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 0x10 PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 8324 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 0x00000010 PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 2112 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define PLL_CNTL__PLL_REF_DIV_SRC__SHIFT 0x10