PHY_CONTROL 14 drivers/net/ethernet/apm/xgene/xgene_enet_sgmac.h #define PHY_CONTROL(src) ((src) & GENMASK(15, 0)) PHY_CONTROL 694 drivers/net/ethernet/intel/igb/e1000_defines.h #define PHY_CONTROL 0x00 /* Control Register */ PHY_CONTROL 366 drivers/net/ethernet/intel/igc/igc_defines.h #define PHY_CONTROL 0x00 /* Control Register */ PHY_CONTROL 16 drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_phy.c #define PHY_CONTROL 0x00 /* Control Register */