PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 4062 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 0x4
PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 4176 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 0x4
PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 4620 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 0x4
PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 10566 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT                                                              0x4
PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 41176 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT                                                              0x4
PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 49516 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_0_0_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT                                                              0x4
PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT 43976 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_2_1_0_sh_mask.h #define PHY_AUX_CNTL__DDCSLAVE_DATA_PD_EN__SHIFT                                                              0x4