PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 4076 drivers/gpu/drm/amd/include/asic_reg/dce/dce_10_0_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10
PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 4190 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_0_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10
PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 4634 drivers/gpu/drm/amd/include/asic_reg/dce/dce_11_2_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10
PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 10573 drivers/gpu/drm/amd/include/asic_reg/dce/dce_12_0_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT                                                                    0x10
PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 8150 drivers/gpu/drm/amd/include/asic_reg/dce/dce_6_0_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x00000010
PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 4132 drivers/gpu/drm/amd/include/asic_reg/dce/dce_8_0_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 0x10
PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT 41183 drivers/gpu/drm/amd/include/asic_reg/dcn/dcn_1_0_sh_mask.h #define PHY_AUX_CNTL__AUX_PAD_RXSEL__SHIFT                                                                    0x10