PEER_REG_RANGE0__END_ADDR__SHIFT 8043 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PEER_REG_RANGE0__END_ADDR__SHIFT 0x00000010
PEER_REG_RANGE0__END_ADDR__SHIFT  470 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PEER_REG_RANGE0__END_ADDR__SHIFT 0x10
PEER_REG_RANGE0__END_ADDR__SHIFT  496 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PEER_REG_RANGE0__END_ADDR__SHIFT 0x10
PEER_REG_RANGE0__END_ADDR__SHIFT  470 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define PEER_REG_RANGE0__END_ADDR__SHIFT 0x10