PEER_REG_RANGE0__END_ADDR_MASK 8042 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PEER_REG_RANGE0__END_ADDR_MASK 0xffff0000L
PEER_REG_RANGE0__END_ADDR_MASK  469 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PEER_REG_RANGE0__END_ADDR_MASK 0xffff0000
PEER_REG_RANGE0__END_ADDR_MASK  495 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PEER_REG_RANGE0__END_ADDR_MASK 0xffff0000
PEER_REG_RANGE0__END_ADDR_MASK  469 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define PEER_REG_RANGE0__END_ADDR_MASK 0xffff0000