PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 1513 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 0xffff
PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 1749 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 0xffff
PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 1617 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 0xffff
PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK 3865 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_0_sh_mask.h #define PCIE_PWR_BUDGET_ENH_CAP_LIST__CAP_ID_MASK                                                             0x0000FFFFL