PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 6961 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 0x00000018
PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 3126 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 0x18
PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 10858 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 0x18
PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 4082 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 0x18
PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 54104 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_2_3_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT                                                        0x18
PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 38313 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_6_1_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT                                                        0x18
PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT 42956 drivers/gpu/drm/amd/include/asic_reg/nbio/nbio_7_4_sh_mask.h #define PCIE_LC_CNTL3__LC_HW_VOLTAGE_IF_CONTROL__SHIFT                                                        0x18