PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 6747 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 0x00000000
PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 2692 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 0x0
PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 3342 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 0x0
PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 3648 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_1_sh_mask.h #define PCIE_F0_DPA_CNTL__SUBSTATE_STATUS__SHIFT 0x0