PB1_TX_LANE6_SCI_STAT_OVRD_REG0__TXPWR_6__SHIFT 6493 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_TX_LANE6_SCI_STAT_OVRD_REG0__TXPWR_6__SHIFT 0x00000000
PB1_TX_LANE6_SCI_STAT_OVRD_REG0__TXPWR_6__SHIFT 7720 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_TX_LANE6_SCI_STAT_OVRD_REG0__TXPWR_6__SHIFT 0x0
PB1_TX_LANE6_SCI_STAT_OVRD_REG0__TXPWR_6__SHIFT 8302 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_TX_LANE6_SCI_STAT_OVRD_REG0__TXPWR_6__SHIFT 0x0