PB1_TX_LANE3_SCI_STAT_OVRD_REG0__TXPWR_3__SHIFT 6385 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_TX_LANE3_SCI_STAT_OVRD_REG0__TXPWR_3__SHIFT 0x00000000
PB1_TX_LANE3_SCI_STAT_OVRD_REG0__TXPWR_3__SHIFT 7612 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_TX_LANE3_SCI_STAT_OVRD_REG0__TXPWR_3__SHIFT 0x0
PB1_TX_LANE3_SCI_STAT_OVRD_REG0__TXPWR_3__SHIFT 8200 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_TX_LANE3_SCI_STAT_OVRD_REG0__TXPWR_3__SHIFT 0x0