PB1_TX_LANE12_SCI_STAT_OVRD_REG0__TXPWR_12__SHIFT 6169 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_TX_LANE12_SCI_STAT_OVRD_REG0__TXPWR_12__SHIFT 0x00000000
PB1_TX_LANE12_SCI_STAT_OVRD_REG0__TXPWR_12__SHIFT 7936 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_TX_LANE12_SCI_STAT_OVRD_REG0__TXPWR_12__SHIFT 0x0
PB1_TX_LANE12_SCI_STAT_OVRD_REG0__TXPWR_12__SHIFT 8506 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_TX_LANE12_SCI_STAT_OVRD_REG0__TXPWR_12__SHIFT 0x0