PB1_TX_LANE10_SCI_STAT_OVRD_REG0__COEFFICIENT_10__SHIFT 6087 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_TX_LANE10_SCI_STAT_OVRD_REG0__COEFFICIENT_10__SHIFT 0x0000000a
PB1_TX_LANE10_SCI_STAT_OVRD_REG0__COEFFICIENT_10__SHIFT 7874 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_TX_LANE10_SCI_STAT_OVRD_REG0__COEFFICIENT_10__SHIFT 0xa
PB1_TX_LANE10_SCI_STAT_OVRD_REG0__COEFFICIENT_10__SHIFT 8446 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_TX_LANE10_SCI_STAT_OVRD_REG0__COEFFICIENT_10__SHIFT 0xa