PB1_RX_LANE10_CTRL_REG0__RX_CFG_OVR_PWRSF_10__SHIFT 5269 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_RX_LANE10_CTRL_REG0__RX_CFG_OVR_PWRSF_10__SHIFT 0x0000000d
PB1_RX_LANE10_CTRL_REG0__RX_CFG_OVR_PWRSF_10__SHIFT 6908 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_RX_LANE10_CTRL_REG0__RX_CFG_OVR_PWRSF_10__SHIFT 0xd
PB1_RX_LANE10_CTRL_REG0__RX_CFG_OVR_PWRSF_10__SHIFT 7486 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_RX_LANE10_CTRL_REG0__RX_CFG_OVR_PWRSF_10__SHIFT 0xd