PB1_PIF_SEQ_STATUS_5__SEQ_CALIBRATION_5__SHIFT 4669 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_SEQ_STATUS_5__SEQ_CALIBRATION_5__SHIFT 0x00000000
PB1_PIF_SEQ_STATUS_5__SEQ_CALIBRATION_5__SHIFT 9644 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_SEQ_STATUS_5__SEQ_CALIBRATION_5__SHIFT 0x0