PB1_PIF_SEQ_STATUS_10__SEQ_CALIBRATION_10__SHIFT 4509 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_SEQ_STATUS_10__SEQ_CALIBRATION_10__SHIFT 0x00000000
PB1_PIF_SEQ_STATUS_10__SEQ_CALIBRATION_10__SHIFT 9884 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_SEQ_STATUS_10__SEQ_CALIBRATION_10__SHIFT 0x0