PB1_PIF_SC_CTL__SC_PHASE_5__SHIFT 4479 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_SC_CTL__SC_PHASE_5__SHIFT 0x0000000c
PB1_PIF_SC_CTL__SC_PHASE_5__SHIFT 9284 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_SC_CTL__SC_PHASE_5__SHIFT 0xc