PB1_PIF_SC_CTL__SC_PHASE_4_MASK 4476 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_SC_CTL__SC_PHASE_4_MASK 0x00000800L
PB1_PIF_SC_CTL__SC_PHASE_4_MASK 9281 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_SC_CTL__SC_PHASE_4_MASK 0x800