PB1_PIF_SC_CTL__SC_PHASE_2_MASK 4472 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_SC_CTL__SC_PHASE_2_MASK 0x00000200L
PB1_PIF_SC_CTL__SC_PHASE_2_MASK 9277 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_SC_CTL__SC_PHASE_2_MASK 0x200