PB1_PIF_CNTL__DA_FIFO_RESET_2_MASK 3936 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_CNTL__DA_FIFO_RESET_2_MASK 0x00000200L
PB1_PIF_CNTL__DA_FIFO_RESET_2_MASK 9073 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_CNTL__DA_FIFO_RESET_2_MASK 0x200