PB1_PIF_CNTL__DA_FIFO_RESET_1__SHIFT 3935 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_CNTL__DA_FIFO_RESET_1__SHIFT 0x00000005
PB1_PIF_CNTL__DA_FIFO_RESET_1__SHIFT 9066 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_CNTL__DA_FIFO_RESET_1__SHIFT 0x5