PB1_PIF_CNTL__DA_FIFO_RESET_0_MASK 3932 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_PIF_CNTL__DA_FIFO_RESET_0_MASK 0x00000002L
PB1_PIF_CNTL__DA_FIFO_RESET_0_MASK 9057 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_PIF_CNTL__DA_FIFO_RESET_0_MASK 0x2