PB1_GLB_SCI_STAT_OVRD_REG4__MODE_12_MASK 3822 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__MODE_12_MASK 0x00030000L
PB1_GLB_SCI_STAT_OVRD_REG4__MODE_12_MASK 5985 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__MODE_12_MASK 0x30000