PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_15__SHIFT 3815 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_15__SHIFT 0x0000001e
PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_15__SHIFT 6000 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_15__SHIFT 0x1e
PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_15__SHIFT 6506 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_15__SHIFT 0x1e