PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 3809 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 0x00000012
PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 5988 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 0x12
PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 6494 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 0x12