PB1_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 3785 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 0x00000016
PB1_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 5962 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 0x16
PB1_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 6468 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG3__FREQDIV_9__SHIFT 0x16