PB1_GLB_SCI_STAT_OVRD_REG2__MODE_5__SHIFT 3765 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG2__MODE_5__SHIFT 0x00000014
PB1_GLB_SCI_STAT_OVRD_REG2__MODE_5__SHIFT 5930 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG2__MODE_5__SHIFT 0x14