PB1_GLB_SCI_STAT_OVRD_REG2__FREQDIV_4__SHIFT 3749 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG2__FREQDIV_4__SHIFT 0x00000012
PB1_GLB_SCI_STAT_OVRD_REG2__FREQDIV_4__SHIFT 5928 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG2__FREQDIV_4__SHIFT 0x12
PB1_GLB_SCI_STAT_OVRD_REG2__FREQDIV_4__SHIFT 6434 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_GLB_SCI_STAT_OVRD_REG2__FREQDIV_4__SHIFT 0x12