PB1_GLB_CTRL_REG3__BG_CFG_RO_REG_VREF_SEL__SHIFT 3633 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB1_GLB_CTRL_REG3__BG_CFG_RO_REG_VREF_SEL__SHIFT 0x00000009
PB1_GLB_CTRL_REG3__BG_CFG_RO_REG_VREF_SEL__SHIFT 5826 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB1_GLB_CTRL_REG3__BG_CFG_RO_REG_VREF_SEL__SHIFT 0x9
PB1_GLB_CTRL_REG3__BG_CFG_RO_REG_VREF_SEL__SHIFT 6332 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB1_GLB_CTRL_REG3__BG_CFG_RO_REG_VREF_SEL__SHIFT 0x9