PB0_TX_LANE4_SCI_STAT_OVRD_REG0__TXMARG_4__SHIFT 3371 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_TX_LANE4_SCI_STAT_OVRD_REG0__TXMARG_4__SHIFT 0x00000004
PB0_TX_LANE4_SCI_STAT_OVRD_REG0__TXMARG_4__SHIFT 5364 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_TX_LANE4_SCI_STAT_OVRD_REG0__TXMARG_4__SHIFT 0x4
PB0_TX_LANE4_SCI_STAT_OVRD_REG0__TXMARG_4__SHIFT 5892 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_TX_LANE4_SCI_STAT_OVRD_REG0__TXMARG_4__SHIFT 0x4