PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 3301 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 0x00000000
PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 5288 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 0x0
PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 5822 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_TX_LANE2_SCI_STAT_OVRD_REG0__TXPWR_2__SHIFT 0x0