PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXPWR_0__SHIFT 3013 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXPWR_0__SHIFT 0x00000000
PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXPWR_0__SHIFT 5216 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXPWR_0__SHIFT 0x0
PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXPWR_0__SHIFT 5754 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXPWR_0__SHIFT 0x0