PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXMARG_0__SHIFT 3011 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXMARG_0__SHIFT 0x00000004
PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXMARG_0__SHIFT 5220 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXMARG_0__SHIFT 0x4
PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXMARG_0__SHIFT 5756 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_TX_LANE0_SCI_STAT_OVRD_REG0__TXMARG_0__SHIFT 0x4