PB0_PIF_SC_CTL__SC_PHASE_5__SHIFT 1431 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_PIF_SC_CTL__SC_PHASE_5__SHIFT 0x0000000c
PB0_PIF_SC_CTL__SC_PHASE_5__SHIFT 8322 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_PIF_SC_CTL__SC_PHASE_5__SHIFT 0xc