PB0_PIF_SC_CTL__SC_PHASE_3_MASK 1426 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_PIF_SC_CTL__SC_PHASE_3_MASK 0x00000400L
PB0_PIF_SC_CTL__SC_PHASE_3_MASK 8317 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_PIF_SC_CTL__SC_PHASE_3_MASK 0x400