PB0_PIF_CNTL__PLL_BINDING_ENABLE__SHIFT  911 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_PIF_CNTL__PLL_BINDING_ENABLE__SHIFT 0x0000000a
PB0_PIF_CNTL__PLL_BINDING_ENABLE__SHIFT 8114 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_PIF_CNTL__PLL_BINDING_ENABLE__SHIFT 0xa