PB0_GLB_SCI_STAT_OVRD_REG4__MODE_15__SHIFT  781 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG4__MODE_15__SHIFT 0x0000001c
PB0_GLB_SCI_STAT_OVRD_REG4__MODE_15__SHIFT 3710 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG4__MODE_15__SHIFT 0x1c