PB0_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT  761 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 0x00000012
PB0_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 3700 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 0x12
PB0_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 4150 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG4__FREQDIV_12__SHIFT 0x12