PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_10__SHIFT  731 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_10__SHIFT 0x0000001a
PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_10__SHIFT 3678 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_10__SHIFT 0x1a
PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_10__SHIFT 4128 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG3__FREQDIV_10__SHIFT 0x1a