PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_2__SHIFT  675 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_2__SHIFT 0x0000001a
PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_2__SHIFT 3618 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_2__SHIFT 0x1a
PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_2__SHIFT 4068 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_2__SHIFT 0x1a