PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_1__SHIFT  673 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_1__SHIFT 0x00000016
PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_1__SHIFT 3614 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_1__SHIFT 0x16
PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_1__SHIFT 4064 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_SCI_STAT_OVRD_REG1__FREQDIV_1__SHIFT 0x16