PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN_MASK  588 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN_MASK 0x00001000L
PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN_MASK 3541 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN_MASK 0x1000
PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN_MASK 3991 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_CTRL_REG3__BG_DBG_IREFBYP_EN_MASK 0x1000