PB0_GLB_CTRL_REG1__RXDBG_D0TH_BYP_EN__SHIFT  555 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_CTRL_REG1__RXDBG_D0TH_BYP_EN__SHIFT 0x0000000e
PB0_GLB_CTRL_REG1__RXDBG_D0TH_BYP_EN__SHIFT 3504 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_CTRL_REG1__RXDBG_D0TH_BYP_EN__SHIFT 0xe
PB0_GLB_CTRL_REG1__RXDBG_D0TH_BYP_EN__SHIFT 3954 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_CTRL_REG1__RXDBG_D0TH_BYP_EN__SHIFT 0xe