PB0_GLB_CTRL_REG0__DBG_TX2RXLBACK_EN_MASK  540 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_GLB_CTRL_REG0__DBG_TX2RXLBACK_EN_MASK 0x04000000L
PB0_GLB_CTRL_REG0__DBG_TX2RXLBACK_EN_MASK 3491 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_GLB_CTRL_REG0__DBG_TX2RXLBACK_EN_MASK 0x4000000
PB0_GLB_CTRL_REG0__DBG_TX2RXLBACK_EN_MASK 3941 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_GLB_CTRL_REG0__DBG_TX2RXLBACK_EN_MASK 0x4000000