PB0_DFT_JIT_INJ_REG0__DFT_INCR_SWP_EN_MASK  514 drivers/gpu/drm/amd/include/asic_reg/bif/bif_3_0_sh_mask.h #define PB0_DFT_JIT_INJ_REG0__DFT_INCR_SWP_EN_MASK 0x00400000L
PB0_DFT_JIT_INJ_REG0__DFT_INCR_SWP_EN_MASK 3911 drivers/gpu/drm/amd/include/asic_reg/bif/bif_4_1_sh_mask.h #define PB0_DFT_JIT_INJ_REG0__DFT_INCR_SWP_EN_MASK 0x400000
PB0_DFT_JIT_INJ_REG0__DFT_INCR_SWP_EN_MASK 4401 drivers/gpu/drm/amd/include/asic_reg/bif/bif_5_0_sh_mask.h #define PB0_DFT_JIT_INJ_REG0__DFT_INCR_SWP_EN_MASK 0x400000