PA_UTCL1_CNTL2__SPARE5__SHIFT 1914 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_0_sh_mask.h #define PA_UTCL1_CNTL2__SPARE5__SHIFT                                                                         0x19
PA_UTCL1_CNTL2__SPARE5__SHIFT 1772 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_1_sh_mask.h #define PA_UTCL1_CNTL2__SPARE5__SHIFT                                                                         0x19
PA_UTCL1_CNTL2__SPARE5__SHIFT 1769 drivers/gpu/drm/amd/include/asic_reg/gc/gc_9_2_1_sh_mask.h #define PA_UTCL1_CNTL2__SPARE5__SHIFT                                                                         0x19